Table of Contents

Three-Dimensional Stacked Dies.

Cofired Ceramic Substrates.

Organic Laminated Substrates and Chip-on-Board.

High-Density Interconnects and Deposited Dielectrics.

Wire and Wirebonds.

Tape Automated Bonds.

Flip-Chip Bonds.

Device and Substrate Attachment.

Cases.

Leads.

Lead Seals.

Lid Seals.

Material and Product Evaluation Methods.

Rework Methods.

Bibliography.

Index.

About the Author

DR. MICHAEL PECHT is a ten-ured faculty member with a jointappointment in Systems Research and Mechanical Engineering, and theDirector of the CALCE Electronic Packag-ing Research Center at theUniversity of Maryland. He has an MS in electrical engineering andan MS and PhD in engineering mechanics from the University ofWisconsin. He is a Professional Engineer and an IEEE Fellow. Heserves on the board of advisors for various companies and was aWestinghouse Professor. He is the chief editor of the IEEETransactions on Reliability, on the board of advisors for IEEESpectrum, and a section editor for the Society of AutomotiveEngineering.

DR. ABHIJIT DASGUPTA is a tenured faculty member with the CALCEElectronic Packaging Research Center at the University ofMaryland.

DR. JOHN W. EVANS is a program manager of the Electronic PackagingProgram for NASA Headquarters in Washington, D.C.

JILLIAN Y. EVANS is an aerospace engineer at the NASA Goddard SpaceFlight Center Facility in Greenbelt, Maryland

PHYSICAL ARCHITECTURE OF VLSI SYSTEMS Robert Hannemann, Allan D.Kraus, and Michael Pecht